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The ADP uses a multimode architecture run at a program. A resistor divider where the upper resistor is connected to VCC, the lower resistor NTC thermistor is connected to GND, and the center point is connected to this pin and acts as a temperature sensor half bridge.
December — Rev. Voltage Error Amplifier Feedback Input.
An external capacitor from this pin to GND sets. Automatic power-saving mode maximizes efficiency with. The ADP also provides accurate and reliable short-circuit protection, adjustable current limiting, and a delayed power-good output. Clock enable output delays the CPU clock until the core.
It is also used as the. Closed-Loop Output Voltage Accuracy.
Active current balancing between output phases. ADP datasheet and specification datasheet. Selectable 1- or 2-phase operation with up to 1 MHz per. The ADP is specified over the extended commercial tempera. Independent current limit and load line setting inputs for. December — Rev. The chip includes a programmable load. A resistor divider where the upper resistor is.
Short-circuit protection with programmable latch-off delay. With its integrated drivers, the ADP is optimized for converting the notebook battery voltage into the core supply voltage required by high performance Intel processors.
A high logic state enables the PWM clock frequency to vary with. Download datasheet Kb Share this page. Crowbar disable threshold disable. Output power or current monitor options.
A low logic state means that the output voltage is outside. Logic high state indicates that the voltage regulator temperature at the remote sensing point exceeded a set alarm threshold level.
A capacitor connected from this pin to GND sets the.
The ADP switches between single- and dual-phase operation to maximize efficiency with all load conditions. Soft transient control reduces inrush current and audio noise. The IC supports on-the-fly output. The phase relationship of the output signals ensures interleaved 2-phase operation.
The chip includes a programmable load. The ADP uses a multimode architecture run at a program- mable switching frequency and optimized for efficiency depending on the output current requirement. A capacitor connected from this pin to GND sets the power-good delay time.
Automatic power-saving mode maximizes efficiency with. A resistor from this pin to GND aep3208 the full-scale. The ADP also provides accurate and reliable short-circuit protection, adjustable current limiting, and a delayed power-good output.
The ADP is specified over the extended commercial tempera.
An external RC network can be used to convert the digital signal stream to an averaged power analog output voltage. Active current balancing between output phases. The IC supports on-the-fly output. This pin remotely senses the CPU core voltage.